Flip flop , JK flip flop, SR flip flop, D flip flop, T flip flop

Introduction to Flip Flops

• The digital circuit considered thus far have been combinational , where the output at any given time are entirely dependent on the inputs that are present at the time .

• Almost every system has likely to have combinational circuit. Most system encountered in practice also include storage elements, which required the system be describe in terms of sequential circuit.

• The most common type of sequential circuit is synchronous type. Synchronous sequential circuit employ signals that affect the storage elements only at discrete

Instant of time .

The storage element employed in clocked sequential circuit are called flip flops

A flip flop is binary cell capable of storing 1 bit of information .

It has two output, one for the normal value and other for the complement value of the bit stored  in it.

Types of flip-flops

1.SR Flip-Flop

2.D Flip-Flop

3.J-K Flip-Flops

4.T Flip-Flops

5.Edge triggered Flip-Flops

6.Master-Slave flip Flops

S-R Flip-Flops 

1.The S-R has three input labeled S(for set ) and R(for reset) and C(for clock ).

2.It has an output Q and sometimes, the flip flop has complemented output , which is    indicated as small circle at the other output terminal ..

3. An arrow shaped in front of C designated a dynamic input.(Flip flop responds to

positive transition (from 0 to 1) of the input clock signal).

Graphical Symbol of SR Flip-Flops :

      

CHARACTERSTIC TABLE

        The operation of the S-R :

     1.If there is no signal at the clock input C, the output of the Circuit cannot change .

        * If S=0 and R=0 : No state change

        Irrespective of the values at input S and R .

     2. Only when the clock signal changes from 0 to  1 output will affect as follow:

  

•If S=0 and R=1 when C changes from 0 to 1 ,output Q is cleared to 0.

        •If S=1 and R=0 when C changes from 0nto 1 , output q is set to 1.

        •Q(t) is the binary state of the q output at the given time (Referred to present state ).

        •Q(t+1) is the binary state of the Q output after the occurrence of a clock transition .(referred to the next state).

        •If S=0 and R=0 ,since it produce to indeterminate next state . This indeterminate condition makes the SR flip Flops difficult in manage and seldom in practice   .

        Logical diagram

click next page for JK FLip-Flip